LIBRARY ieee;
USE ieee.std_logic_1164.all;

ENTITY vlanint IS 
	PORT(vlanreq, clock, emptylist :	IN	STD_LOGIC;
		vlanstart	:	OUT STD_LOGIC);
END vlanint;

ARCHITECTURE Behavior OF vlanint IS
	SIGNAL counter : STD_LOGIC_VECTOR(1 DOWNTO 0);
BEGIN
	PROCESS(clock)
	BEGIN
	IF emptylist = '1' THEN
		vlanstart <= '0';
		counter <= "00";

	ELSIF(Clock'EVENT AND Clock = '1')THEN
		IF (vlanreq = '1' AND emptylist = '0' AND counter = "00") THEN
			vlanstart <= '1';
			counter <= "01";
			
		ELSIF counter = "01" THEN 
			counter <= "10";
		
		ElSIF counter = "10" THEN
			counter <= "11";
			
		ELSIF counter = "11" THEN
			counter <= "00";
			vlanstart <= '0';
		END IF;
	
	END IF;
	
	
	END PROCESS;
	

END Behavior;